An analog-to-digital converter (ADC) is an electronic circuit that converts an analog input voltage to a digital output. There are several quality metrics associated with an ADC, including gain, offset, differential non-linearity (DNL), and integral non-linearity (INL) errors. The offset of an ADC is the constant difference between the actual transfer function of the ADC and an ideal transfer function. The transfer function of an ADC is a plot of the analog input voltage (e.g., horizontal axis) versus the digital output codes (e.g., vertical axis).
FIG. 1 is a graph 100 illustrating the effect of offset error in an ADC. The graph 100 includes a horizontal axis 102 representing input voltage, and a vertical axis 104 representing digital output code. An ideal (unipolar) transfer function of the ADC is represented by plot 106. The transfer function 106 is not continuous, but is a plot of 2N codes, where N is the resolution of the ADC. Thus, the transfer function 106 is a “stair-step” like plot. In practical ADCs, the transfer function 106 includes a ½ least significant bit (LSB) offset. That is, a line 108 drawn through the code transitions intersects the axis 102 ½ of an LSB from the origin. An offset error shifts the entire transfer function left or right along the input voltage axis. For example, an actual transfer function is represented by the plot 110. As the offset is a constant difference, it can be measured by using the intersection of the transfer function 110 with the horizontal axis when a ramp input stimulus is applied to the ADC. A line 112 drawn through the code transitions of the transfer function 110 begins at a point shifted to the right from the origin by the offset. Offset error can be positive or negative and is usually measured in volts or in terms of LSBs, which can be converted to voltage.
The gain of an ADC is the input-signal level-dependent error in the output transfer function. The gain is measured from the slope of the transfer function when a ramp input stimulus is applied to the ADC. FIG. 2 is a graph 200 illustrating the effect of gain error in an ADC. The graph 200 includes a horizontal axis 202 representing input voltage, and a vertical axis 204 representing digital output code. A line 206 represents the ideal (unipolar) transfer function, and a line 208 represents an actual transfer function having gain. The stair-step nature of the transfer functions has been omitted for clarity. The difference between the slope of the actual transfer function (slope of the line 208) and the slope of the ideal transfer function (slope of the line 206) is the gain error. Gain error can be positive or negative and is usually measured as a percent with respect to input signal level.
DNL error is a measure of the deviation of the width of an output code from the ideal. FIG. 3 is a graph 300 illustrating the effect of DNL error in an ADC. The graph 300 includes a horizontal axis 302 representing input voltage, and a vertical axis 304 representing digital output code. A plot 306 represents the ideal (unipolar) transfer function, and a plot 308 represents an actual transfer function. The width of each step in the ideal transfer function 306 is equally spaced for all codes. In the actual transfer function 308, widths of the steps vary. The DNL error is the value of the worst case deviation over all output codes. INL error is closely related to DNL error and is the running sum of DNL errors over all codes. INL error describes the deviation of the ramp transfer function from the ideal best-fit straight line or, specifically, the deviation of the actual code transitions from the ideal when offset and gain errors have been removed. The INL error is the value of the worst case deviation over all output codes.
Traditional techniques of calibrating an ADC to correct gain are performed in the analog domain, by either trimming or compensating the analog circuitry so that the errors are minimized. Digital correction of an ADC output is typically avoided. Present digital gain correction techniques introduce errors in the other ADC parameters, such as INL and DNL errors. For example, an ADC with 10-bit resolution ideally provides for 1024 steps of voltage between a minimum and maximum input voltage. The digital output codes range from 0 to 1023. If an ADC produces a code of 950 when the input voltage is at maximum (full scale) instead of 1023, then the ADC has gain error. Traditional digital gain correction attempts to map the output code range of 0 to 950 onto the desired range of 0 to 1023. Given the limited amount of source information, it is clear that by definition not all 1023 output codes can be represented. Thus, some codes will be missing along the transfer function and, as a result, the DNL and INL parameters are severely impacted. Accordingly, there exists a need in the art for a method and apparatus for digital calibration of an ADC that overcomes the aforementioned deficiencies.